title " Hogeschool van Utrecht Opdracht week "
	subtitle " titel van het programma "
        

; XT Oscillator is used target 4 MHz 
; do not use power up nor watchdog nor code protection !!       

;destinations for file register-byte

indirect        equ     00h                     ;Indirect data adressing
tmr0            equ     01h                     ;counter register
pcl             equ     02h                     ;Program Counter
status          equ     03h                     ;status word register
fsr             equ     04h                     ;File select register
port_a          equ     05h
port_b          equ     06h
tris_a          equ     05h                     ; new value for port a reg
tris_b          equ     06h                     ; new value for port b reg
eedata		equ	08h			; eeprom registers
eeadr		equ	09h
pclatch		equ	0ah			; 
intcon		equ	0bh			; interrupt settings

;bit declarations

w               equ     00h                     ;destination is W-register
f               equ     01h                     ;destination is a File register

input           equ     01h
output          equ     00h


rp0             equ     05h                     ;bank change bit
zero_bit        equ     02h                     ;zero bit in status byte
carry_bit       equ     00h                     ;carry bit in status byte
dc_bit		equ	01h			;digit carry
tf0             equ     02h                     ;timer overflow in intcon
gie             equ     07h


; byte declarations



; reset vector equ 000h jump to out off call

                org     000h
                goto    start

; initialiseren van de poorten

start
	
		clrf	port_a			; clear init byte port_a
                clrf    port_b                  ; clear init byte port_b
                bsf     status,rp0              ; select bank 1
                movlw   B'00000000'             ; 1 = input , 0 = output 
                movwf	tris_a			; set port a in bank 1
                movlw   B'11111111'             ; 1 = input , 0 = output 
                movwf	tris_b			; set port b in bank 1
		bcf     status,rp0		; select bank 0 
   

; start of the programm

main
						; your coding comes here

		btfss	port_b,3	;als port_b,3 = 0 dan weer terug naar start
		goto 	clearbit
		btfsc	port_b,2	;als port_b,2 = 1 dan naar setten port_a
		goto 	setbit
		btfsc	port_b,1	;als port_b,1 = 1 dan naar setten port_a
		goto 	setbit
		goto 	clearbit	;anders clear uitgangsbit



		
setbit
		bsf	port_a,0
		goto	main		



clearbit
		bcf	port_a,0
		goto	main		



		end